Integrated circuits are used in many portable electronic products, such as cell phones, portable computers, voice recorders, etc. They are also used in many larger electronic systems, such as cars, planes, industrial control systems, and the like. Across virtually all applications, there continues to be demand for reducing the size and increasing performance of the devices. The intense demand is now at a peak in portable electronics that have become so ubiquitous and are frequently shrinking in size.
Wafer manufacturing strives to reduce transistor or capacitor feature size in order to increase circuit density and enhance functionality. Device geometries with sub-micron line widths are so common that individual chips routinely contain millions of electronic devices. Reduced feature size has been quite successful in improving electronic systems, and continuous development is expected in the future. However, significant obstacles to further reduction in feature size are being encountered. These obstacles include defect density control, optical system resolution limits, and availability of processing material and equipment. Attention has therefore increasingly shifted to semiconductor packaging as a means to fulfill the relentless demands for enhanced system performance and smaller component size.
Some of the functions that are required to support the new applications are based on different technologies. As an example, high capacity memory may be built in a different technology than a high speed processor. This situation prevents them from being fabricated on the same silicon wafer, but the different technologies can be packaged together to deliver highly space efficient components.
Drawbacks of conventional designs include a relatively large footprint of the package on the mounting surface of motherboard. The footprint reflects what is typically measured as the maximum dimension of the package, namely, the x-y dimension. In applications where mounting space is at a premium, such as pagers, portable telephones, and personal computers, among others, a large footprint is undesirable. With the goal of increasing the amount of circuitry in a package, but without increasing the area of the package so that the package does not take up any more space on the circuit board, manufacturers have been stacking two or more die within a single package. Unfortunately, sufficient overlap for electrical interconnect and large footprint top packages have plagued previous stacked package or package on package designs.
Thus, a need still remains for an integrated circuit packaging system with interposer that can support high input/output count devices and high quality stacked package designs. In view of the ever-increasing demand for more functions in a smaller space, it is increasingly critical that answers be found to these problems. In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is critical that answers be found for these problems. Additionally, the need to reduce costs, improve efficiencies and performance, and meet competitive pressures adds an even greater urgency to the critical necessity for finding answers to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.